Lital Electronics Inc.

United States

• Physical Size6.3 x 9.19 inches

The LVME1553-2 Dual 1553 Terminal Board provides full, intelligent interfacing between two independent dual redundant MIL-STD-1553B Data Busses and the VMEbus. A special Direct Interface, allows the 1553 terminals to be connected directly to a CPU bus located on another VMEbus board, therefore bypassing the VMEbus latency. Software controls the operation of each independent channel of the LVME1553-2 as either a MIL-STD-1553 Bus Controller (BC), Remote Terminal (RT) or Bus Monitor Terminal (MT). At the core of the unit are two ILC DDC Corp dual-redundant BUS-61553 Advanced Integrated Mux Hybrids, operating at 16MHz clock rate . The LVME1553-2 board may be configured with one or two BUS-61553 components, providing and option to interface with up to two independent 1553 buses using a single double Eurocard. Each 1553 channel contains 8Kx16 or 64Kx16 of on-board protocol SRAM. The shared RAM is fully double buffered, preventing partially updated data from being read by the VMEbusCPU host or transmitted to the 1553 data bus.

• Physical Size6.3 x 9.19 inches

The LVME1750AP Single Board Computer (LVME1750AP SBC) is a high performance VMEbus compatible module which implements the MIL-STD-1750A instruction Set Architecture (ISA). The LVME1750AP was designed to function as a stand-alone microcomputer, as a single CPUcontroller in VMEbus systems, or as a single CPU element in a multiprocessor VMEbus environment. At the core of the unit is the Performance Semiconductor Corp. P1750A CPU, operating at 20, 39, 40 MHz clock rate. The P1750A provides powerful machine resources and computational capabilities while able to execute the MIL-STD-1750A computer instruction set. The LVME1750AP SBC can contain up to 1M words of on-board EPROMEEPROM and up to 1M words of on-board static RAM with Error Detection and Correction or Parity Generation and Detection.

• Maximum Acquisition Speed;100MHz Timing

The LPR1750 Pace 1750A Preprocessor provides a complete interface between the PACE1750A target system and the Hewlett-Packard 165051, 1660CCS & 16500510 Logic Analyzers. The Preprocessor provides an easy and convenient way to connect the Pace 1750A signals to the Logic Analyzer. The LPI1750 PACE1750A inverse assembler will display the captured data in MIL-STD-1750A mnemonics, once the configuration file is loaded into the Logic Analyzer and the Analyzer is connected to the target system. Decoded status information provided by the inverse assembler includes:

• Physical Size6.3 x 9.187 inche

The LVME1750APM Single Board Computer (LVME1750APM SBC) is a high performance VMEbus compatible module which implements the MIL-STD-1750A instruction Set Architecture (ISA). The LVME1750APM was designed to function as a stand-alone microcomputer , as a single CPUcontroller in VMEbus systems, or as a single CPU element in a multiprocessor VMEbus environment. At the core of the unit is the Performance Semiconductor Corp. P1750A CPU, operating at 20, 30, 40 MHz clock rate. The P1750A provides powerful machine resources and computational capabilities while able to execute the MIL-STD-1750A computer instruction set. The LVME1750AP SBC can contain up to 64K words of on EPROM and up to 1M words of on-board static RAM with Error Detection and Correction or Parity Generation and Detection. Utilizing the P1753 Memory Management Unit (MMU) and a System Definition Register (SDR), the LVME1750APM SBC is capable of accessing up to 8M words of external memory via the VMEbus. Also, two programmable multi protocol synchronous asynchronous serial interfaces are provided. LVME1750APM sBC fully supports VME compatible multi master configurations and system expansion.